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Guangyu Sun’s Homepage 中文版

I'm actively recruiting undergraduate students. If you are interested in my research, please feel free to send me an email or stop by my office with a schedule.

Guangyu Sun

Assistant Professor
Center for Energy-efficient Computing and Applications
EECS School, Peking University

Phone: +86-10-6275-7978
Office: 515N, Science Bldg. #5, PKU, Beijing, 100871
Email: g s u n [at] pku [dot] edu [dot] cn

 

[News]

[Research]

[Education]

[Publications]

[Projects]

[Activities]

 


Bio

Dr. Guangyu Sun is an assistant professor of Center for Energy-efficient Computing and Applications (CECA) at Peking University. He received his B.S. and M.S degrees from Tsinghua University, Beijing, in 2003 and 2006, respectively. He received his Ph.D. degree in Computer Science from the Pennsylvania State University in 2011. Dr. Sun received the 2012 EDAA outstanding dissertation award for his Ph.D. thesis titled “Exploring Memory Hierarchy Design with Emerging Memory Technologies”.

His research interests include computer architecture and computer systems. He has published 40+ journals and refereed conference papers in these areas with a focus on memory/storage architectures and systems. He is serving as PI on one NSFC young research grant and one industry grant supported by AMD and Co-PI on one National High Technology Research and Development Program ("863"Program). His research work on memory architecture/system for Big Data is also supported by Baidu.

Dr. Sun is an active volunteer in the communities of computer architecture, VLSI, and design automation. He has been serving as a program committee member and track chair for several conferences in these areas, including DATE, ASP-DAC, GLSVLSI, VLSID, and NAS. He is serving as the local arrangement chair and in TPC for ISLPED 2013. He has also served as a peer reviewer and technical referee for several journals, which include IEEE Micro, IEEE TVLSI, IEEE TCAD, etc. Guangyu Sun is a member of CCF, IEEE, and ACM.


Recent News

  • The paper titled with "SBAC: A Statistics based Cache Bypassing Method for Asymmetric-access Caches" is accepted to ISLPED 2014. Congrats to Chao!
  • The co-authored paper titled with "Half-DRAM: a High-bandwidth and Low-power DRAM System from the Rethinking of Fine-grained Activation." is accepted to ISCA.
  • The paper titled with "An Efficient Design and Implementation of LSM-Tree based Key-Value Store on Open-Channel SSD." is accepted to Eurosys 2014. Congrats to Peng!
  • The co-authored paper titled with "3D-SWIFT: A High-Performance 3D-Stacked Wide IO DRAM" received best paper award at GLVLSI 2014. 
  • ASP-DAC 2015 will be held in Makuhari, Japan. Dr. Guangyu Sun serves as a TPC member.

Research Interests

  • High Performance, Low Power, and Reliable Memory Architectures
    • Energy-efficient Cache and Main memory Architectures
    • Energy-efficient Memory Hierarchy based on Emerging Non-volatile Memory
    • Reliable and Secure Memory Architectures
  • Storage System and Heterogeneous System for Big Data Applications
    • Energy Efficient Storage Systems for Big Data Apps
    • System and Architecture Co-optimization for Big Data Apps
    • Heterogeneous Architecture and System Design for Big Data Apps

Education Background


Research Projects

  • NSFC project, "Energy-Efficient Cache Design using Emerging Technology in Multi-core" (PI)
  • National 863 project, Peking University sub-project, "Storage System Architecture and Technology Based on the New Memory Devices" (PI)
  • Advanced Micro Devices (AMD)  project, "Exploration of Energy-efficient System Design for Modern Applications in China" (PI)

Publications

  1. Chao Zhang, Guangyu Sun, Peng Li, Tao Wang, Dimin Niu, Yiran Chen, “SBAC: A Statistics based Cache Bypassing Method for Asymmetric-access Caches”, to appear at ISLPED 2014
  2. Tao Zhang, Cong Xu, Ke Chen, Guangyu Sun, Yuan Xie"3D-SWIFT: A High-Performance 3D-Stacked Wide IO DRAM.", Great Lakes Symposium on VLSI(GLSVLSI), May 2014. (Best paper award)
  3. Jingyu Deng, Yun Liang, Guojie Luo, Guangyu Sun”Rapid Design Space Exploration of Two-level Unified Caches.”, to appear at International Symposium on Circuits and Systems(ISCAS), June 2014.
  4. 孙广宇, 王鹏, 张超, "基于新型非易失存储的高能效、高可靠性存储结构", 中国计算机学会通讯接收.
  5. Peng Wang, Guangyu Sun, Song Jiang, Jian Ouyang, Shiding Lin, Chen Zhang, Jason Cong"An Efficient Design and Implementation of LSM-Tree based Key-Value Store on Open-Channel SSD.", European Conference on Computer Systems(Eurosys), April 2014.
  6. Tao Zhang, Ke Chen, Cong Xu, Guangyu Sun, Tao Wang, Yuan Xie"Half-DRAM: a High-bandwidth and Low-power DRAM System from the Rethinking of Fine-grained Activation.", International Symposium on Computer Architecture(ISCA), June 2014.
  7. Jia Zhan, Yuan Xie, Guangyu Sun"NoC-Sprinting: Interconnect for Fine-Grained Sprinting in the Dark Silicon Era.", to appear at Design Automation Conference(DAC), June 2014.
  8. Tao Zhang, Matt Poremba, Cong Xu, Guangyu Sun, Yuan Xie"CREAM: a Concurrent-Refresh-Aware DRAM Memory Architecture.", IEEE International Symposium on High Performance Computer Architecture(HPCA), February 2014.
  9. Zhe Wang, Daniel A. Jimenez, Cong Xu, Guangyu Sun, Xie Yuan"Adaptive Placement and Migration Policy for an STT-RAM-Based Hybrid Cache.", IEEE International Symposium on High Performance Computer Architecture(HPCA), February 2014.
  10. Mengjie Mao, Guangyu Sun , Yong Li, Alex K. Jones, Yiran Chen"Prefetching Techniques for STT-RAM based Last-level Cache in CMP Systems.", 19th Asia and South Pacific Design Automation Conference(ASP-DAC), Page(s): 67-72, Jan. 2014.
  11. "Exploring Memory Hierarchy Design with Emerging Memory Technologies", Springer
  12. Jishen Zhao, Guangyu Sun, Gabriel H. Loh, and Yuan Xie"Optimizing GPU Energy Efficiency with 3D Diestacking Graphics Memory and Reconfigurable Memory Interface.", ACM Transactions on Architecture and Code Optimization (TACO), Vol. 10, No. 4, pp.24:1-24:25, 2013.
  13. Tao Zhang, Cong Xu, Guangyu Sun, Yuan Xie"Lazy Precharge: An Overhead-free Method to Reduce Precharge Overhead for Memory Parallelism Improvement of DRAM System.", 31st IEEE International Conference on Computer Design(ICCD), Page(s): 138-144 , Oct. 2013.
  14. Xian Zhang, Chao Zhang, Tao Zhang, Guangyu Sun, Jia Di"An Efficient Run-time Encryption Scheme for Non-volatile Main Memory.", Compilers, Architecture and Synthesis for Embedded Systems (CASES), Page(s): 1-10, Sep. 2013.
  15. Jian Ouyang, Shiding Lin, Zhenyu Hou, Peng Wang, Yong Wang, Guangyu Sun"Active SSD Design for Energy-efficiency Improvement of Web-scale Data Analysis.", Low Power Electronics and Design (ISLPED), Page(s): 286-291, Sept. 2013.
  16. Xiaolong Xie, Yun Liang, Guangyu Sun, Deming Chen"An Efficient Compiler Framework for Cache Bypassing on GPUs.", Computer-Aided Design (ICCAD), Page(s): 516-523, Nov. 2013.
  17. Peng Wang, Guangyu Sun, Tao Wang, Yuan Xie, Jason Cong"Designing Scratchpad Memory Architecture with Emerging STT-RAM Memory Technologies.", International Symposium on Circuits and Systems(ISCAS), Page(s): 1244-1247, May 2013.
  18. Jie Guo, Guangyu Sun, Chun Jason Xue, Hai Li"The Detection of Malicious Data Attack on NAND Flash Storage System Based on Power Signature.", Work-in-Progress Session at DAC 2013, June 2013.
  19. Yanfei Lv, Xuexuan Chen, Guangyu Sun, Bin Cui"A Probabilistic Data Replacement Strategy for Flash-based Hybrid Storage System.", the 15th Asia-Pacific Web Conference (APWeb), Page(s): 360-371, April 2013.
  20. Jian Ouyang, Lei Jia, Zhenyu Hou, Guangyu Sun, Guangjun Xie ,Yong Wang"A Practical Implementation of GPU based Accelerator for Deep Neural Networks.",4th Workshop on SoCs, Heterogeneous Architectures and Workloads, 2013.
  21. Yi Zhou, Chao Zhang, Guangyu Sun, Yu Zhang, Kun Wang"Asymmetric-access Aware Optimization for STT-RAM Caches with Process Variations.", Great Lakes Symposium on VLSI(GLSVLSI), Page(s): 143-148, May 2013.
  22. Yaojun Zhang, Lu Zhang, Wujie Wen, Guangyu Sun, Yiran Chen"Multi-level Cell STT-RAM: Is It Realistic or Just a Dream?", Computer-Aided Design (ICCAD), Page(s): 526-532, Nov.2012.
  23. Guangyu Sun, Huazhong Yang, Yuan Xie"Performance/Thermal-Aware Design of 3D-Stacked L2 Caches for CMPs.", ACM Transactions on Design Automation of Electronic Systems (TODAES), Article No. 13, Apr. 2012.
  24. Guangyu Sun, Yaojun Zhang, Yu Wang, Yiran Chen"Improving Energy Efficiency of Write-asymmetric Memories by Log Style Write.", Low Power Electronics and Design (ISLPED), Page(s): 173-178, July 2012.
  25. Jishen Zhao, Guangyu Sun, Gabriel Loh, Yuan Xie"Energy-Efficient GPU Design with Reconfigurable In-Package Graphics Memory.", Low Power Electronics and Design (ISLPED), Page(s): 403-408, July 2012.
  26. Guangyu Sun, Cong Xu, Yuan Xie"Modeling and Design Exploration of FBDRAM as On-chip Memory.", Design, Automation & Test in Europe Conference & Exhibition (DATE), Page(s): 1507 - 1512 , Mar 2012.
  27. Yibo Chen, Guangyu Sun, Qiaosha Zou, Yuan Xie"3D HLS: Incorporating High-Level Synthesis in Physical Planning of Three-Dimensional (3D) ICs.",Design, Automation & Test in Europe Conference & Exhibition (DATE), Page(s): 1185-1190, Mar 2012.
  28. Chun Jason Xue, Youtao Zhang, Yiran Chen, Guangyu Sun, J. Joshua Yang, Hai Li"Emerging Non-volatile Memories: Opportunities and Challengis.", Hardware/Software Codesign and System Synthesis (CODES+ISSS) (Sepcial Session), Page(s): 325-334, Oct.2011.
  29. Guangyu Sun, Eren Kursun, Jude Rivers, Yuan Xie, "Exploring the Vulnerability of CMPs to Soft Errors with 3D Stacked Non-Volatile Memory", IEEE International Conference on Computer Design(ICCD), Page(s): 366-372, Oct. 2011.
  30. Jue Wang, Xiangyu Dong, Guangyu Sun, Dimin Niu, Yuan Xie, "Energy-Efficient Multi-Level Cell Phase-Change Memory System with Data Encoding", IEEE International Conference on Computer Design (ICCD), Page(s): 175-182, Oct. 2011.
  31. Guangyu Sun, Christopher Hughes, Changkyu Kim, Jishen Zhao, Cong Xu, Yuan Xie, Yen-Kuang Chen, "Moguls: a Model to Explore Memory Hierarchy for Throughput Computing", International Symposium on Computer Architecture(ISCA), Page(s): 377-388, June 2011.
  32. Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xie, N. Vijaykrishnan, Chita R. Das "Architecting NoCs for Stacked 3D STT-RAM Caches in CMPs", International Symposium on Computer Architecture(ISCA), Page(s): 69-80, June 2011.
  33. Guangyu Sun, Dimin Niu, Jin Ouyang, Yuan Xie, "A Frequent-Value Based PRAM Memory Architecture", Asia and South Pacific Design Automation Conference(ASP-DAC), Page(s): 211-216, Jan 2011.
  34. Y. Chen, H. Li, Z. Sun, X. Wang, W. Zhu, Guangyu Sun, Yuan Xie, "Access Scheme of Multi-Level Cell Spin-Transfer Torque Random Access Memory and Its Optimization", IEEE International Midwest Symposium on Circuits and Systems(MWSCAS), Page(s): 1109-1112, Aug. 2010.
  35. Guangyu Sun, Xiangyu Dong, Xiaoxia Wu, Yuan Xie, "3D Architectures of Non-Volatile Memories", Workshop on Technology-Architecture Interaction: Emerging Technologies and their Impact on Comp. Architecture, July 2010.
  36. Guangyu Sun, Yuan Xie, "CMP Architectures with Emerging 3D and Non-Volatile Memory Technologies", D43D: Second Design for 3D Silicon Integration Workshop, May 2010.
  37. Xiaoxia Wu, Guangyu Sun, Xiangyu Dong, Reetuparna Das, Jian Li, Chita Das, Yuan Xie, "Cost-driven 3D Integration with Interconnect Layers", Design Automation Conference(DAC), Page(s): 150-155, July 2010.
  38. Yongsoo Joo, Dimin Niu, Xiangyu Dong, Guangyu Sun, Naehyuck Chang, Yuan Xie, "Energy- and Endurance-Aware Design of Phase Change Memory Cache", Design, Automation & Test in Europe Conference & Exhibition (DATE), Page(s): 136-141, Mar. 2010.
  39. Guangyu Sun, Yongsoo Joo, Yibo Chen, Yuan Xie, Yiran Chen, Hai Li, "A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement", High Performance Computer Architecture (HPCA), Page(s): 1-12, Jan. 2010.
  40. Jin Ouyang, Guangyu Sun, Yibo Chen, Lian Duan, Tao Zhang, Yuan Xie, Mary Jane Irwin, "Arithmetic Unit Design Using 180nm TSV- based 3D Stacking", 3D System Integration (3DSiC), Page(s): 1-4, Oct. 2009.
  41. Ahmed Al Maashri, Guangyu Sun, Xiangyu Dong, Vijay Narayanan, and Yuan Xie, "3D GPU Architecture using Cache Stacking: Performance, Cost, Power and Thermal Analysis", IEEE International Conference on Computer Design (ICCD), Page(s): 254-259, Oct. 2009.
  42. Guangyu Sun, Xiaoxia Wu, and Yuan Xie, "Exploration of 3D Stacked L2 Cache Design for High Performance and Efficient Thermal Control", Low Power Electronics and Design (ISLPED), Page(s): 295-298, Aug. 2009.
  43. Yiran Chen, Hai Li, Cheng-Kok Koh, Kaushik Roy, Jing Li, Guangyu Sun, "Variable-Latency Adder (VL-Adder) Designs for Low Power and NBTI Tolerance", Very Large Scale Integration (VLSI) Systems, Page(s): 1621-1624, 2009.
  44. Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yiran Chen, "A Novel Architecture of the 3D Stacked MRAM L2 Cache for CMPs", High Performance Computer Architecture (HPCA), Page(s): 239-249, Feb. 2009.
  45. Srinath Sridharan, Mike Debole, Guangyu Sun, Yuan Xie, Vijaykrishnan Narayanan, "A Criticality-Driven Microarchitectural Three Dimensional (3D) Floorplanner", Asia and South Pacific Design Automation Conference(ASP-DAC), Page(s): 763-768, Jan. 2009.
  46. Xiangyu Dong, Xiaoxia Wu, Guangyu Sun, Helen Li, Yiran Chen, Yuan Xie, "Circuit and Mircoarchitecture Evaluation of 3D Stacking Magnetic RAM (MRAM) as a Universal Memory Replacement", Design Automation Conference (DAC), Page(s): 554-559, July. 2008.
  47. Hai Lin, Guangyu Sun, Yunsi Fei, Yuan Xie, Anand Sivasubramaniam, "Thermal-aware design considerations for application-specific instruction set processor", Application Specific Processors (SASP), Page(s): 63-68, June. 2008.
  48. Feng Wang, Guangyu Sun, Yuan Xie, "A Variation Aware High Level Synthesis Framework", Design, Automation & Test in Europe Conference & Exhibition (DATE), Page(s): 1063-1068, Mar. 2008.
  49. Guangyu Sun, Yi Xu, Zhiqiang Gao, "A Watermarking System for IP Protection by Buffer Insertion Technique", Quality Electronic Design (ISQED), Page(s): 5 pp. - 675 , Mar. 2006.
  50. Guangyu Sun, Zhiqiang Gao, Min Ni, "A Hierarchy Watermarking Technique for IP Core Protection", International Conference on ASIC (ASICON), Page(s): 1131-1135, Oct. 2005.

Professional Service Activities

  • ISLPED, Local arrangement chair, 2013
  • ISLPED, TPC, 2014
  • ISLPED, TPC, 2013
  • DATE, TPC, 2014
  • DATE, TPC, 2013
  • DATE, TPC, 2012
  • GLVLSI, Track chair, 2014
  • GLVLSI, TPC, 2013
  • NAS, Track Chair
  • VLSI, Design TPC, 2012
  • ASPDAC, TPC, 2014
  • ASPDAC, TPC, 2013
  • ICPP, TPC, 2013
  • CASES, TPC, 2014
  • CASES, TPC, 2013
  • DAC, TPC, 2014
  • DAC, forum TPC, 2014
  • DAC, forum TPC, 2013